Use faster memory barrier on x86.

diff --git a/src/include/storage/barrier.h b/src/include/storage/barrier.h
index 09fc67305b3b4954513fc6b5d14cb59af69d35b9..7a5edde394d835bb6ded3384685ab81a3122ff78 100644 (file)
--- a/src/include/storage/barrier.h
+++ b/src/include/storage/barrier.h
@@ -71,10 +71,11 @@ extern slock_t dummy_spinlock;
  * reordered with other stores, but a load can be performed before a subsequent
  * store.
  *
- * "lock; addl" has worked for longer than "mfence".
+ * "lock; addl" has worked for longer than "mfence", but mfence is considerably
+ * faster.
  */
 #define pg_memory_barrier()            \
-       __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
+       __asm__ __volatile__ ("mfence" : : : "memory")
 #define pg_read_barrier()              pg_compiler_barrier()
 #define pg_write_barrier()             pg_compiler_barrier()
 #elif defined(__x86_64__)              /* 64 bit x86 */