Fix memory barrier support on icc on ia64, 2nd attempt.
authorHeikki Linnakangas <heikki.linnakangas@iki.fi>
Tue, 9 Jul 2013 08:31:26 +0000 (11:31 +0300)
committerHeikki Linnakangas <heikki.linnakangas@iki.fi>
Tue, 9 Jul 2013 08:34:18 +0000 (11:34 +0300)
Itanium doesn't have the mfence instruction - that's a 386 thing. Use the
"mf" instruction instead.

This reverts the previous commit to add "#include <emmintrinsic.h>"; the
problem was not with a missing #include.

src/include/storage/barrier.h

index a54a74c1a3e4f2e8c7056cb5b20a8171fa242220..5df3ab1a84167501ddc781c6c3851edaefc22411 100644 (file)
@@ -53,8 +53,12 @@ extern slock_t dummy_spinlock;
 /*
  * icc defines __GNUC__, but doesn't support gcc's inline asm syntax
  */
-#include <emmintrin.h>
+#if defined(__ia64__) || defined(__ia64)
+#define pg_memory_barrier()        __mf()
+#else if defined(__i386__) || defined(__x86_64__)
 #define pg_memory_barrier()        _mm_mfence()
+#endif
+
 #define pg_compiler_barrier()  __memory_barrier()
 #elif defined(__GNUC__)