Add s_lock support for SuperH architecture.

After a patch originally submitted by Nobuhiro Iwamatsu, but corrected
(I think) to match our guidelines for safe use of asm fragments.
This should be considered untested ...

diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index dceceba851f9fe6c52d0e05fb55ec1547402b61a..48208b9db750e938793344c3fe94f910bf16c368 100644 (file)
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -568,6 +568,36 @@ typedef int slock_t;
 #endif /* __m32r__ */
 
 
+#if defined(__sh__)                            /* Renesas' SuperH */
+#define HAS_TEST_AND_SET
+
+typedef unsigned char slock_t;
+
+#define TAS(lock) tas(lock)
+
+static __inline__ int
+tas(volatile slock_t *lock)
+{
+       register int _res;
+
+       /*
+        * This asm is coded as if %0 could be any register, but actually SuperH
+        * restricts the target of xor-immediate to be R0.  That's handled by
+        * the "z" constraint on _res.
+        */
+       __asm__ __volatile__(
+               "       tas.b @%2    \n"
+               "       movt  %0     \n"
+               "       xor   #1,%0  \n"
+:              "=z"(_res), "+m"(*lock)
+:              "r"(lock)
+:              "memory", "t");
+       return _res;
+}
+
+#endif  /* __sh__ */
+
+
 /* These live in s_lock.c, but only for gcc */