Lemmings

 1.Lemmings1

module top_module(
    input clk,
    input areset,    // Freshly brainwashed Lemmings walk left.
    input bump_left,
    input bump_right,
    output walk_left,
    output walk_right); //  

    // parameter LEFT=0, RIGHT=1, ...
    reg state, next_state;
    parameter left = 1'b0;
    parameter right = 1'b1;
    

    always @(*) begin
        case(state)
            left:
                begin
                    if(!bump_left)  next_state = left;
                    else next_state = right;
                end
            right:
                begin
                    if(!bump_right) next_state = right;
                    else next_state = left;
                end
        endcase
    end

    always @(posedge clk, posedge areset) begin
        // State flip-flops with asynchronous reset
        if(areset)
            state <= left;
        else
            state <= next_state;
    end

    // Output logic
    assign walk_left = (state == left);
    assign walk_right = (state == right);

endmodule

2.Lemmings2

module top_module (
    input clk,
    input areset,
    input bump_left,
    input bump_right,
    input ground,
    output walk_left,
    output walk_right,
    output aaah
);
    parameter left = 2'b0;
    parameter right = 2'b1;
    parameter hleft = 2'b10;
    parameter hright = 2'b11;
    reg[1:0] state;
    reg[1:0] next_state;
    wire[1:0] p;
 
    assign p = {bump_left,bump_right};
 
    always @(*) begin
        case(state)
            left: 
                begin
                    if (ground == 1'b0) begin
                        next_state = hleft;
                    end
                    else if ((p == 2'b10)||(p == 2'b11)) begin
                        next_state = right;
                    end
                    else begin
                        next_state = left;
                    end
                end
            right:
                begin
                    if (ground == 1'b0) begin
                        next_state = hright;
                    end
                    else if ((p == 2'b01)||(p == 2'b11)) begin
                        next_state = left;
                    end
                    else begin
                        next_state = right;
                    end
                
                end
            hleft:
                begin
                    if (ground == 1'b0) begin
                        next_state = hleft;
                    end
                    else begin
                        next_state = left;
                    end
                
                end
            hright:
                begin
                    if(ground == 1'b0)
                        next_state = hright;
                	else
                    	next_state = right;
 				end
        endcase
    end
 
    always @(posedge clk or posedge areset) begin
        if (areset) begin
            state <= left;
        end
        else state <= next_state;
    end
 
    assign walk_left = (state == left);
    assign walk_right = (state == right);
    assign aaah  =((state == hleft)|(state == hright));
 
endmodule

3.Lemmings 3

module top_module(
    input clk,
    input areset,
    input bump_left,
    input bump_right,
    input ground,
    input dig,
    output walk_left,
    output walk_right,
    output aaah,
    output digging
);
 
    parameter left = 3'b0;
    parameter right = 3'b1;
    parameter d_left = 3'b10;
    parameter d_right = 3'b11;
    parameter f_left = 3'b100;
    parameter f_right = 3'b101;
 
    reg[2:0] state;
    reg[2:0] next_state;
    wire[1:0] bump;
    assign bump = {bump_left,bump_right};
 
    always @(*) begin
        case (state)
            left:begin
                if (ground == 1'b0) 
                    next_state = f_left;
                else if(dig == 1'b1)
                    next_state = d_left;
                else if((bump == 2'b10)||(bump == 2'b11))
                    next_state = right;
                else
                    next_state = left;               
            end 
 
             right:begin
                if (ground == 1'b0) 
                    next_state = f_right;
                else if(dig == 1'b1)
                    next_state = d_right;
                else if((bump == 2'b01)||(bump == 2'b11))
                    next_state = left;
                else
                    next_state = right;               
            end 
 
            d_left:begin
                if(ground == 1'b0)
                    next_state = f_left;
                else
                    next_state = d_left;
            end
             d_right:begin
                if(ground == 1'b0)
                    next_state = f_right;
                else
                    next_state = d_right;
 
            end
 
             f_left:begin
                if(ground == 1'b0)
                    next_state = f_left;
                else
                    next_state = left;
            end
            f_right:begin
                if(ground == 1'b0)
                    next_state = f_right;
                else
                    next_state = right;
 
            end       
            
        endcase
    end
 
    always @(posedge clk or posedge areset) begin
        if(areset)
            state <= left;
        else
            state <= next_state;
    end
 
    assign walk_left = (state == left);
    assign walk_right = (state == right);
    assign digging = ((state == d_left)||(state == d_right));
    assign aaah = ((state == f_left)||(state == f_right));
 
 
endmodule

4.Lemmings4

module top_module(
    input clk,
    input areset,
    input bump_left,
    input bump_right,
    input ground,
    input dig,
    output walk_left,
    output walk_right,
    output aaah,
    output digging
);
 
    parameter left = 3'b0;
    parameter right = 3'b1;
    parameter d_left = 3'b10;
    parameter d_right = 3'b11;
    parameter f_left = 3'b100;
    parameter f_right = 3'b101;
    parameter dead = 3'b110;
    parameter splatter = 3'b111;
 
    reg[2:0] state;
    reg[2:0] next_state;
    reg[4:0] count;
    
    wire[1:0] bump;
    assign bump = {bump_left,bump_right};
 
    always @(*) begin
        case(state)
            left:begin
                if(ground == 1'b0)
                    next_state = f_left;
                else if(dig == 1'd1)
                    next_state =  d_left;
                else if((bump == 2'b10)||(bump == 2'b11 ))
                    next_state = right;
                else
                    next_state = left;
            end
 
            right:begin
                if(ground == 1'b0)
                    next_state = f_right;
                else if(dig == 1'd1)
                    next_state =  d_right;
                else if((bump == 2'b01)||(bump == 2'b11 ))
                    next_state = left;
                else
                    next_state = right;
            end
 
            d_left:begin
                if(ground == 1'b0)
                    next_state = f_left;
                else
                    next_state = d_left; 
            end
            d_right:begin
                if(ground == 1'b0)
                    next_state = f_right;
                else
                    next_state = d_right; 
            end
 
            f_left:begin
                if((ground == 1'b0)&&(count < 5'd20 ))
                    next_state = f_left;
                else if((ground == 1'b0)&&(count >= 5'd20))
                    next_state = splatter;
                else 
                    next_state = left;
            end
 
            f_right:begin
                if((ground == 1'b0)&&(count < 5'd20 ))
                    next_state = f_right;
                else if((ground == 1'b0)&&(count >= 5'd20))
                    next_state = splatter;
                else 
                    next_state = right;
            end
 
            splatter:begin
                if(ground == 1'b1)
                    next_state = dead;
                else
                    next_state = splatter; 
            end
            dead:
                next_state = dead;
        endcase
    end 
    always @(posedge clk or posedge areset) begin
        if(areset)
            state <= left;
        else
            state <= next_state;
    end
    always @(posedge clk or posedge areset) begin
        if(areset)
            count <= 5'd0;
        else if((next_state == f_left)||(next_state == f_right))
            count <= count + 1'b1;
        else
            count <= 5'd0;
    end
 
    assign walk_left = (state == left);
    assign walk_right = (state == right);
    assign aaah = ((state == f_left)||(state == f_right)||(state == splatter));
    assign digging = ((state == d_left)||(state == d_right));
    
 
 
endmodule