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c语言初学经典入门工具之一，BC3.1中文使用手册，初学borland c的非常有用的工具参考书

• Enable a system without an ISA or X-bus. • Reduce the cost of traditional X-bus devices. • Intended for use by devices down on a motherboard only (i.e. no connector). • Meet the data transfer rate of X-bus, and exceed those data rates where appropriate. • Perform the same cycle types as the X-bus: Memory, I/O, DMA, and Bus Master • Support new Firmware Memory cycle type allowing separate boot BIOS firmware memory cycles and application memory cycles. • Increase the memory space from 16MB on the X-bus to 4GB to allow BIOS sizes much greater than 1MB, and other memory devices outside of the traditional 16MB range. • Synchronous design. Much of the challenge of an X-bus design is meeting the different, and in some cases conflicting, ISA timings. Make the timings synchronous to a reference well known to component designers, such as PCI. • Software transparency: do not require special drivers or configuration for this interface. The motherboard BIOS should be able to configure all devices at boot. • Support desktop and mobile implementations. • Ability to support a variable number of wait-states. • Ability to have I/O and memory cycles retried in SMM handler. • Ability to support wake-up and other power state transitions.

rtthread stm32f1xx hal bsp 支持bootloader源代码，偏移地址为0x4000。 https://blog.csdn.net/Mooney_yuan/article/details/83030695

I2C总线协议标准中文版， 编写模拟I2C总线协议必备工具书，